Run-time Reconfigurable Instruction Set Processor (Rt-risp): Design and Simulation Using Verilog-hld - Shoab Ahmed Khan - Livros - LAP LAMBERT Academic Publishing - 9783847336778 - 5 de janeiro de 2012
Caso a capa e o título não sejam correspondentes, considere o título como correto

Run-time Reconfigurable Instruction Set Processor (Rt-risp): Design and Simulation Using Verilog-hld

Shoab Ahmed Khan

Preço
HK$ 508
excluindo impostos

Item sob encomenda (no estoque do fornecedor)

Espera-se estar pronto para envio 17 - 23 de jul
Adicione à sua lista de desejos do iMusic

Run-time Reconfigurable Instruction Set Processor (Rt-risp): Design and Simulation Using Verilog-hld

Run-Time Reconfigurable Instruction Set Processors are next generation processors, which can optimize their instruction sets according to the demands of the applications being under execution on them. This optimization is achieved through reconfiguration in their hardware on fly. In this way the reconfigurable processors adapt their hardware, which is most suitable one for the running application and consequently they enhance the performance. Reconfigurable instruction set processors are the programmable processors that contain the reconfigurable logic in one or more of their functional units. The hardware design of such type of processors can be categorized into two main tasks: The design of reconfigurable logic itself and the design of the communication interface of reconfigurable logic with the remaining modules of the processor.

Mídia Livros     Paperback Book   (Livro de capa flexível e brochura)
Lançado 5 de janeiro de 2012
ISBN13 9783847336778
Editoras LAP LAMBERT Academic Publishing
Páginas 184
Dimensões 150 × 11 × 226 mm   ·   292 g
Idioma German  

Mostrar tudo

Mais por Shoab Ahmed Khan